The present invention relates to a silica insulation film with a reduced dielectric constant and a method of forming the same, as well as relates to a silica inter-layer insulator with a reduced dielectric constant between multi-level interconnections in a semiconductor device and a method of forming the same, in addition relates to a semiconductor device with a multi-level interconnection structure having a silica inter-layer insulator with a reduced dielectric constant and a method of fabricating the same.
With an increase in density of integration of ultra large scale integrated circuit, the feature size of integrated semiconductor devices has been reduced to submicron order and also multi-level interconnection techniques become more important. In order to electrically isolate the different level interconnections, an inter-layer insulator is provided between the different level interconnections. The inter-layer insulator is required to possess a high stability at high temperature and a high electrical insulation property, in addition a good gap filling property. In prior art, a silica film or a silicon dioxide film, a silicon nitride film and a phospho-silicate glass film were, for example, used as inter-layer insulators between different level interconnections. Those inter-layer insulators were usually formed by various chemical vapor deposition methods.
In recent years, requirement for a further shrinkage of the feature size of integrated semiconductor devices has been on the increase in accordance with design rules of advanced large scale integrated circuits. The further shrinkage of the feature size of integrated semiconductor devices has raised a serious problem with delay in signal transmission on interconnections due to a parasitic capacitance between the interconnections rather than signal delay of individual devices integrated. The improvement in high speed performance of the large scale integrated circuit would be limited by the problem with delay in signal transmission on interconnections due to a parasitic capacitance between the interconnections even if a considerable shrinkage of the feature size of integrated semiconductor devices could be realized.
In order to realize a further improvement in high speed performance of the large scale integrated circuit, it is important to reduce the parasitic capacitance between the interconnections as many as possible. Since the parasitic capacitance between the interconnections depends upon a dielectric constant of the inter-layer insulator. Namely, in order to reduce the parasitic capacitance between the interconnections, it is required to reduce the dielectric constant of the inter-layer insulator. The silica film is advantageous in matching with LSI processes but is was difficult to largely reduce the dielectric constant from ∈ r=3.9.
In 1994 Dry Process Symposium pp. 133., it is disclosed to have proposed introduction of fluorine into a silica film to attempt to reduce the dielectric constant. In order to reduce the dielectric constant to about 3.5, it is required to add fluorine into the silica film at several tends percents, whereby the silica film exhibits a hygroscopic property and also a hydrolysis of fluorine is caused. As a result, fluorine is unstable in the silica film. For this reason, it was difficult to reduce the dielectric constant of the fluoro-containing silica film to less than about 3.5.
It is disclosed to have proposed the use of spin coating method to deposit a spin-on-glass film. This spin-on-glass film has a problem with residual solvent or a residual moisture.
In Japanese laid-open patent publication No. 8-227888, it is disclosed to have proposed to add an alkyl group into the silica film by a chemical vapor deposition method. The alkyl group is, however, unstable at high temperature.
In the above circumstances, it had been required to develop a novel silica film free from the above problems and a method of forming the same.